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Semiconductor device fabrication |
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MOSFET scaling (process nodes) |
In semiconductor manufacturing, the "1 nm process" represents the next significant milestone in MOSFET (metal–oxide–semiconductor field-effect transistor) scaling, succeeding the "2 nm" process node. It continues the industry trend of miniaturization in integrated circuit (IC) technology, which has been essential for improving performance, increasing transistor density, and reducing power consumption.
The term "1 nanometer" has no relation to any actual physical feature (such as gate length, metal pitch or gate pitch) of the transistors. According to the projections contained in the 2021 update of the International Roadmap for Devices and Systems published by the Institute of Electrical and Electronics Engineers (IEEE), a "1 nm node range label" is expected to have a contacted gate pitch of 42 nanometers and a tightest metal pitch of 16 nanometers. The first 1 nm chips are expected to be launched in 2027[1]