28 nm process

Semiconductor device fabrication
MOSFET scaling (process nodes)
020 μm – 1968 010 μm – 1971 006 μm – 1974 003 μm – 1977  1.5 μm – 1981 001 μm – 1984 800 nm – 1987 600 nm – 1990 350 nm – 1993 250 nm – 1996 180 nm – 1999 130 nm – 2001 090 nm – 2003 065 nm – 2005 045 nm – 2007 032 nm – 2009 028 nm – 2010 022 nm – 2012 014 nm – 2014 010 nm – 2016 007 nm – 2018 005 nm – 2020 003 nm – 2022
Future 002 nm ~ 2025
Half-nodes Density CMOS Device (multi-gate) Moore's law Transistor count Semiconductor Industry Nanoelectronics
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The "28 nm" lithography process is a half-node semiconductor manufacturing process based on a die shrink of the "32 nm" lithography process.^[1] It appeared in production in 2010.^[2]

Since at least 1997, "process nodes" have been named purely on a marketing basis, and have no direct relation to the dimensions on the integrated circuit;^[3] neither gate length, metal pitch or gate pitch on a "28nm" device is twenty-eight nanometers.^[4][5][6][7]

Taiwan Semiconductor Manufacturing Company has offered "28 nm" production using high-K metal gate process technology.^[8]

GlobalFoundries offers a "28nm" foundry process called the "28SLPe" ("28nm Super Low Power") foundry process, which uses high-K metal gate technology.^[9]

According to a 2016 presentation by Sophie Wilson, 28nm has the lowest cost per logic gate. Cost per gate had decreased as processes shrunk until reaching 28nm, and has slowly risen since then.^[10]